- Published 2026.11.10 02:54
US grid limits lead to repeated restrictions on large data center permits
Integrated cooling architecture in HBM5 cuts thermal resistance by 30%
Direct liquid-cooled eSSD lineup with 1,000x higher thermal efficiency also unveiled
SK hynix has begun marketing customized liquid-cooled memory packaging to US big tech AI data centers facing mounting power grid regulatory pressure. The move is seen as a strategy to cement its leadership in the next-generation AI memory market through packaging technologies that reduce power consumption and maximize thermal efficiency.
According to East Asia Brief, a global Asia-focused media outlet, on Nov. 10, SK hynix proposed customized cooling packaging solutions on Nov. 8 (local time) to US data center operators grappling with regional power grid constraints and regulations stemming from high-density AI server installations. The move comes as power consumption of a single AI server rack has surpassed 100 kilowatts (kW) due to improved computing performance, making it difficult for conventional air-cooling systems to handle the heat.
US cloud providers are currently experiencing severe power grid bottlenecks. In the US elections held earlier this month, 46 jurisdictions, including major states such as Ohio and Georgia, passed measures restricting large computing facility permits or shifting utility capital expenditures. With global data center power consumption projected to reach 945 terawatt-hours (TWh) by 2030, accounting for 75% of new US electricity demand, achieving silicon-level thermal efficiency has emerged as a key commercial prerequisite for building next-generation facilities.
In response, SK hynix is promoting an integrated high bandwidth memory (HBM) packaging architecture called 'iHBM' to manage heat inside the silicon stack. The company first unveiled iHBM on May 26, saying it embeds integrated cooling elements (ICE) directly in the physical layer connecting the memory stack and the base logic die.
The integrated cooling elements use a highly thermally conductive, silicon-based, non-conductive material to draw heat away from concentrated signal paths. Unlike standard memory stacks that expel heat through the core die, this approach creates a direct thermal dissipation path, reducing package thermal resistance by more than 30%. SK hynix said, "Through structural redesign, we can create a direct thermal dissipation path and reduce package thermal resistance by over 30%." The company plans to apply this integrated cooling architecture to its commercial HBM5 production line, with sampling scheduled to begin in 2027.
Beyond HBM, the company also presented enterprise solid-state drive (eSSD) solutions to boost data center power efficiency. On Oct. 16, SK hynix demonstrated its direct liquid-cooling eSSD lineup, the 'PEB210 E1.S,' at an industry hardware summit in San Jose. The product is designed at 9.5 millimeters (mm) thick, allowing liquid coolant to flow directly across the drive chassis.
Liquid cooling offers up to 1,000 times higher heat transfer efficiency than air-based cooling, significantly reducing auxiliary fan power consumption inside densely packed computing enclosures. Given that large cloud providers spend about 40% of total data center power on air coolers and ventilation, substantial cost savings are expected. Lowering server-level thermal resistance allows operators to achieve higher computing density within limited power budgets.
Competitors are also accelerating development of heat spreaders and hybrid bonding technologies to capture the next-generation memory socket market. Samsung Electronics supplies HBM to hyperscale buyers and maintains an alternative thermal packaging lineup using integrated heat spreaders. Taiwan's TSMC provides advanced packaging lines such as chip-on-wafer-on-substrate (CoWoS), where SK hynix memory stacks are combined with host processors.
Delays in US power grid expansion threaten to postpone billions of dollars worth of data center campus developments over the next four years. Cloud providers face soaring electricity rates and interconnection queues stretching up to seven years. Thermal-related chip redesigns are shifting the capital burden for energy conservation from external plant equipment to component-level silicon packaging.
※ This article is an AI translation of the Korean original published by Korea Credit News; it was checked by automated quality guards and published by the English edition desk.
